Implementation of quantum gate operations using neural networks

Thumbnail Image
Issue Date
Zabihi, Shahri A.
Kumar, Preethika

All quantum circuits are designed using different quantum gates, which can be decomposed into elementary gates. The number of elementary gates in a quantum circuit is called the gate count. Typically, there is a direct correspondence between the gate count and the complexity of a quantum circuit. Quantum systems are generally very fragile, and a quantum bit (qubit) can lose its super-position state very easily. This process is called decoherence. As such, when implementing a quantum operation, it becomes necessary to minimize the gate count as much as possible. This thesis focuses on two important applications where reducing the gate count is very significant. The first is quantum error correction (QEC). In a quantum error correction code (QECC), one information qubit is encoded with two or more auxiliary qubits to form a logical/encoded qubit. Oftentimes, when performing gate operations on logical qubits, decoding is required, which opens the system to decoherence. The aim here is to design encoded quantum gates in such a way that the decoding process is no longer needed for implementing gate operations on QEC circuits. The second focus is a controlled-NOT (CNOT) gate operation between uncoupled (remote) qubits. In order to implement a gate operation in a linear nearest neighbor (LNN) architecture, the qubits that are not neighbors need to be brought adjacent to each other before a gate operation can be performed between them. The LNN architecture is significant because most physical implementations of a practical quantum computer use this layout. Here, the aim is to implement a CNOT gate between remote qubits in an LNN architecture without bringing the qubits adjacent to each other, thereby tremendously reducing the gate count. This research employed a neural network approach based on gradient descent technique to reduce the gate count.

Table of Content
Thesis (M.S.)--Wichita State University, College of Engineering, Dept. of Electrical Engineering and Computer Science