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Performance of LRU block replacement algorithm with pre-fetching
Pendse, Ravi Bhagavathula, Ravi
Pendse, Ravi
Bhagavathula, Ravi
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1998-08-09
Type
Conference paper
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Keywords
Cache storage,Hard disks,Microprocessors,Memory architecture,Power generation economics,Random access memory,Semiconductor storage,Yarn
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Citation
Pendse, R.; Bhagavathula, R.; "Performance of LRU block replacement algorithm with pre-fetching," Circuits and Systems, 1998. Proceedings, 1998 Midwest Symposium on, vol., no., pp.86-89, 9-12 Aug 1998 doi: 10.1109/MWSCAS.1998.759441
Abstract
An economical solution to the need for unlimited amounts of fast memory is a memory hierarchy, which takes advantage of locality and cost/performance of memory technologies. Most of the advanced block replacement algorithms exploit the presence of temporal locality in programs to achieve a better performing cache. A direct fallout of this approach is the increased overhead involved due to the complexity of the algorithm without any significant improvement in the cache performance. The performance of the cache could be improved if spatial locality present in the programs is further exploited. This paper presents the results of the investigation of the impact of pre-fetching techniques on the miss rates due to the basic Least Recently Used (LRU) block replacement algorithm. Simulations reveal an improvement of about 60% in the miss rates for instruction caches due to pre-fetching and a corresponding improvement of about 10% for data caches.
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The full text of this article is not available on SOAR. WSU users can access the article via IEEE Xplore database licensed by University Libraries: http://libcat.wichita.edu/vwebv/holdingsInfo?bibId=1045954
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IEEE
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Circuits and Systems, 1998. Proceedings, 1998 Midwest Symposium on;vol., no., pp.86-89, 9-12 Aug 1998