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    A novel graphical technique for analysis of runtime cache behavior

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    Pendse_1997d (284.2Kb)
    Date
    1997-08-06
    Author
    Pendse, Ravi
    Tambe, N.
    Walterscheidt, U.
    Metadata
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    Citation
    Pendse, R.; Tambe, N.; Walterscheidt, U.; , "A novel graphical technique for analysis of runtime cache behavior," Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on , vol.2, no., pp. 1322- 1325 vol.2, 3-6 Aug. 1997 doi: 10.1109/MWSCAS.1997.662325
    Abstract
    A novel technique is introduced to graphically analyze the runtime behavior of block replacement algorithms used in cache controllers. The new method allows a behavioral comparison of two or more algorithms, previously impossible due to the vast amount of data involved in cache simulations. Absolute and relative comparisons are demonstrated and the application in the development of a modified LRU is shown.
    Description
    The full text of this article is not available on SOAR. WSU users can access the article via IEEE Xplore database licensed by University Libraries: http://libcat.wichita.edu/vwebv/holdingsInfo?bibId=1045954
    URI
    http://hdl.handle.net/10057/3847
    http://dx.doi.org/10.1109/MWSCAS.1997.662325
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