• Login
    View Item 
    •   SOAR Home
    • Graduate School
    • GRASP: Graduate Research and Scholarly Projects
    • Proceedings: 12th Annual Symposium on Graduate Research and Scholarly Projects
    • View Item
    •   SOAR Home
    • Graduate School
    • GRASP: Graduate Research and Scholarly Projects
    • Proceedings: 12th Annual Symposium on Graduate Research and Scholarly Projects
    • View Item
    JavaScript is disabled for your browser. Some features of this site may not work without it.

    A directory based hybrid cache update strategy to reduce memory latency of shared memory multiprocessors

    View
    Abstract
    Download
    Abstract
     
    Date
    2016-04-29
    Author
    Chidella, Kishore K.
    Metadata
    Show full item record
    Citation
    Chidella, Kishore K. 2016. A directory based hybrid cache update strategy to reduce memory latency of shared memory multiprocessors. --In Proceedings: 12th Annual Symposium on Graduate Research and Scholarly Projects. Wichita, KS: Wichita State University, p. 31
    Abstract
    Multiple cores with a shared memory on a single-chip provide an excellent architecture to achieve fast computation. However, shared memory multiprocessors with typical write update and write invalidate strategies suffer due to the fact that the number of cores is normally less than 16, bandwidth is often wasted, and memory latency becomes very high. This paper presents a directory based hybrid cache update strategy for shared memory multiprocessors with large number of cores to help reduce memory latency. The proposed directory scheme continuously checks for requests from cores, satisfies the requests according to the priority, starving cases, and updates the directory accordingly. We simulate a 32-core system using pure write update (PWU), pure write invalidates (PWI), and the proposed hybrid strategies. Preliminary experimental results show that the proposed strategy decreases memory latency by 24% when compared with the PWI strategy. The proposed strategy is as good as the PWU strategy.
    Description
    Presented to the 12th Annual Symposium on Graduate Research and Scholarly Projects (GRASP) held at the Heskett Center, Wichita State University, April 29, 2016.

    Research completed at Department of Electrical Engineering and Computer Science, College of Engineering
    URI
    http://hdl.handle.net/10057/12178
    Collections
    • Proceedings: 12th Annual Symposium on Graduate Research and Scholarly Projects [116]
    • EECS Graduate Student Conference Papers [86]

    SOAR is a service of Wichita State University Libraries
    Contact Us | Send Feedback
    Site statistics 
     

     

    Browse

    All of SOARCommunities & CollectionsBy Issue DateAuthorsTitlesSubjectsTypeThis CollectionBy Issue DateAuthorsTitlesSubjectsType

    My Account

    LoginRegister

    Statistics

    View Usage Statistics

    SOAR is a service of Wichita State University Libraries
    Contact Us | Send Feedback
    Site statistics