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    Efficient implementation of multi-control Toffoli gates in linear nearest neighbor arrays

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    dissertation (841.8Kb)
    Date
    2014-05
    Author
    Daraeizadeh, Saman
    Advisor
    Kumar, Preethika
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    Abstract
    Most promising implementations in quantum computing are based on Linear Nearest Neighbor (LNN) architectures, where qubits only interact with neighbors. Multi-control Toffoli gates are used in many quantum applications such as error correction and algorithms like Shor's factorization. Typically, to implement a multi-control Toffoli gate in an LNN architecture, additional operations called swap gates are required to bring the qubits adjacent to each other. This may increase the total number of quantum gates and computational overhead of the circuit. Here, we propose a new method to implement multi-control Toffoli gates in LNN arrays without using swap gates. The circuit reduction techniques discussed here are based on 3 lemmas. Using the lemmas, we show how to implement multi-control Toffoli gates in LNN arrays with different separations between the control and target qubits. The key feature of our scheme is to involve qubits other than control and target qubits to take part in gate operations. We call these qubits auxiliary" qubits and they are used in our gate decomposition protocols. Auxiliary qubits can be in any arbitrary states, a|0>+beta|1> , and are always restored back to their original states. Since we do not use swap gates to bring qubits adjacent to each other, compared to circuits using swap gates, the total number of gate operations used in our method is decreased, and the quantum cost is lowered. In addition, for implementing multi-control Toffoli gate operations efficiently in LNN arrays, we also show how to extend our protocols to 2D arrays. Here, in addition to translating our gate reduction techniques, directly from 1D to 2D, we use further simplification techniques for particular arrangements of qubits.
    Description
    Thesis (M.S.)--Wichita State University, College of Engineering, Dept. of Electrical Engineering and Computer Science
    URI
    http://hdl.handle.net/10057/10952
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