This paper details the design and simulation of a fault-tolerant Quantum-dot Cellular Automata (QCA) NOT gate. A version of the standard NOT gate can be constructed to take advantage to the ability to easily integrate redundant structures into a QCA design. The fault-tolerant characteristics of this inverter are analyzed with QCADesigner v2.0.3 (Windows version) simulation software. These characteristics are then compared with the characteristics of two other non-redundant styles of NOT gates. The redundant version of the gate is more robust than the standard style for the inverter. However, another simple inverter style seems to be even more than this fault-tolerant design. Both versions of the gate will need to be studied further in the future to determine which design is most practical.
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Thesis (M.S.)--Wichita State University, College of Engineering, Dept. of Electrical and Computer Engineering
Master's Theses [823] This collection includes Master's theses completed at the Wichita State University Graduate School (Fall 2005 --)
EECS Theses and Dissertations [181] Collection of Master's theses and Ph.D. dissertations completed at the Dept. of Electrical Engineering and Computer Science